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Arteris
Arteris formed in 2003 around the insight that traditional bus-based interconnect would choke as chips multiplied processor cores and memory controllers.
Arteris
Arteris formed in 2003 around the insight that traditional bus-based interconnect would choke as chips multiplied processor cores and memory controllers. Chairman Charlie Janac has not been a classic venture-scale founder but rather a long-tenured operator who steered the company through multiple product generations before its eventual listing. The core work — creating packet-based network-on-chip fabrics — solved a physical design problem that became acute once the mobile revolution compressed everything into a single system-on-chip. Early licensees included Samsung and Qualcomm, embedding Arteris IP into application processors that powered the first wave of smartphones. The company licenses interconnect IP across three principal product lines: the FlexNoC physical interconnect for on-chip data routing, Magillem for IP deployment and register management, and a growing portfolio of cache-coherent and last-level cache solutions aimed at artificial intelligence clusters. Its business model is intellectual-property licensing plus royalty streams tied to volume production — the same structure that built ARM and Ceva. Coverage spans mobile handsets, automotive advanced driver-assistance systems, data center accelerators, and IoT endpoints. Geographic licensing stretches from Korean and Taiwanese foundry ecosystems to European automotive tier-ones and North American hyperscaler designs. Magna International and Mobileye are among publicly cited automotive adopters; Baidu has used Arteris IP in its Kunlun AI accelerator. The company employs roughly 250 professionals and operates from Campbell, California with additional engineering and sales presence in Paris, Shanghai, and Seoul. January 2024 marked the acquisition of Semifore, adding hardware-software interface register management that tightens integration with Arm and RISC-V ecosystems. Arteris listed on Nasdaq in October 2021, converting a long private-company runway into a publicly tracked vehicle with a market capitalization that has since reflected the broader semiconductor design-tool cycle. Arteris occupies a peculiar structural position: it is neither a pure EDA tool vendor nor a chip company. It sells licensed design IP, which makes its revenue trajectory dependent on chip-design starts rather than unit volumes alone. The moat lies in the physical constraints of modern silicon — once an architecture commits to a specific network-on-chip topology, swapping interconnect vendors is architecturally expensive, yielding sticky recurring royalty income. Management has articulated a transition toward system-level IP bundling that moves the catalog closer to the SoC architect's primary procurement list, which would shift competitive dynamics against fragmented point-tool providers.
General information
Firm type
Unclassified
Principals
Charlie Janac
Chairman
Sector focus
Frequently asked questions
What does Arteris actually sell — is it EDA software or chip IP?
It sells semiconductor intellectual property — pre-verified digital logic blocks that chip designers license and embed directly into their own integrated circuits. The primary products are FlexNoC (a configurable network-on-chip interconnect fabric) and Magillem (IP deployment automation tools). This places Arteris in the design-IP licensing business model alongside firms like Arm Holdings, not in the electronic design automation tooling space occupied by Synopsys or Cadence.
How does Arteris generate revenue from its licensees?
Two streams: upfront license fees paid when a customer signs a contract to use the interconnect IP for a specific chip design, and per-unit royalties collected once those chips enter volume production. The royalty tail is the structural advantage — because changing a network-on-chip topology late in design is prohibitively expensive, most licensees continue paying royalties across successive product generations.
What is the competitive moat around network-on-chip technology?
Physical interconnect design becomes locked early in a chip's architectural planning phase. Once a team commits its register maps, cache-coherency protocols, and floorplan to a specific fabric like FlexNoC, the cost and schedule risk of swapping to an alternative vendor create high switching costs. The moat is architectural stickiness, not patent exclusivity.
Does Arteris compete with Arm, or are the two complementary?
Complementary more than competitive. Arm sells processor core IP (CPU and GPU designs), while Arteris sells the interconnect fabric that lets those cores talk to memory, I/O, and each other. Many systems-on-chip combine Arm Cortex cores with Arteris FlexNoC fabric. The boundaries blur only at the system-level cache and coherency layer, where both companies have introduced offerings — but bundling deals with ARM remain observed in practice.
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