Synopsys

Synopsys earns licensing fees and per-design royalties from its EDA software and silicon IP catalogs. Because its tools perform the floorplanning, verification, and signoff for leading-edge chips, the firm collects a share of the value of each new processor released by companies like Nvidia and AMD. This royalty-driven model means its revenue scales with semiconductor unit volumes, not just engineering seat count.

The Ansys acquisition combined Synopsys's digital chip-design dominance with Ansys's multiphysics simulation capabilities that analyze heat, electromagnetic interference, and mechanical stress across entire electronic systems. The combined entity aims to provide a single design environment from silicon-level detail up to full-system validation for sectors like automotive and aerospace, where thermal and structural simulation are as critical as the chip logic itself.

Its customers span the entire semiconductor value chain — integrated device manufacturers like Intel and Samsung, fabless designers like Qualcomm and Nvidia, and pure-play foundries like TSMC. Its main competitor is Cadence Design Systems, which operates a similar dual-track business in EDA and IP. Synopsis holds a leading share in key subcategories such as interface IP and signoff tools.

Synopsys primarily sells the software tools and reusable silicon intellectual property blocks that other companies use to design and verify their own semiconductors. While it does not manufacture finished commercial chips, it creates the physical interface IP — like DDR memory controllers and PCIe connectivity blocks — that chipmakers integrate directly onto their silicon, turning those standards into silicon-proven designs.

Synopsys collaborates with foundries to certify its EDA tool flows and IP blocks on advanced process nodes before they are publicly available. This early access ensures that as soon as a new manufacturing process is ready, chip design teams can immediately begin using proven Synopsys flows. Recent partnership announcements include certified AI-driven design flows for TSMC's N2 process and multi-die reference flows for Samsung's gate-all-around technology.